Revolutionizing Verification With GenAI-Powered Automation – A Paradigm Shift Towards Agentic Workflows

The verification of complex System-on-Chip (SoC) designs is undergoing a significant transformation with the advent of Artificial Intelligence (AI) powered automation. Traditional single-run, single-engine algorithms are giving way to data-driven approaches that leverage insights from multiple runs of diverse engines across the entire verification campaign. The Verisium platform exemplifies this shift, optimizing verification workloads, enhancing coverage, and accelerating bug diagnosis. Recent advances in Large Language Models (LLMs) and Large Reasoning Models (LRMs) are further propelling this trend, profoundly impacting the capabilities of automation tools. While individual applications of LLMs can yield substantial productivity gains, the most profound benefits will emerge from integrating multiple GenAI powered tasks into multi-step automated workflows. This vision of an agentic workflow for design and verification represents the future trajectory of the field.

Yossi comes with many years of experience at Intel where he served in various roles. He started his career in CAD and later moved to pre-silicon design. In his most recent role at Intel, Yossi led Intel's Client products post silicon validation where he managed a global engineering team. Later Yossi was working on networking CPU leading the Engineering team at Marvell Israel. Yossi served as VP R&D in an AI and Automotive startup. In his current role Yossi is leading the Silicon agentic AI solutions in Cadence.